Utilizing CMOS 90nm-micron technology operating at 332Mhz the EyeQ2™ is Mobileye's 2nd generation processor for use in vision based Driver Assistance Systems and is approximately six times more powerful than the EyeQ™. The EyeQ2 follows the same concept, albeit more powerful, to that of the EyeQ - dual CPU cores running in parallel with multiple additional dedicated and programmable cores. This allows an even greater range of multi-function bundles to be implemented on a single processor camera system.
View ST Press Release
EyeQ2 winner of the prestigious 'Best Electronic Design 2008' for Best Automotive Design, Best
Vision Processor by Electronic Design Magazine.
The Mobileye EyeQ2™ architecture consists of two floating point, hyper-thread 32bit RISC CPUs (MIPS32® 34K® cores), five Vision Computing Engines (VCE), three Vector Microcode Processors (VMP™), Denali 64bit Mobile DDR Controller, 128bit internal Sonics Interconnect, dual 16bit Video input and 18bit Video output controllers, 16 channels DMA and several peripherals. The MIPS34K CPU manages the five VCEs, three VMP™ and the DMA, the second MIPS34K CPU and the multi-channel DMA as well as the other Peripherals. The five VCEs, three VMP™ and the MIPS34K CPU perform all the intensive vision computations required by the multi-function bundle applications. This gives the EyeQ2 unrivalled computing power enabling the high functionality bundles to run on a single processor based camera.
Examples of multiple functions bundles are currently in series development for major global vehicle makers:
Late 2009
Industrial Powered Vehicles - 360deg multi-camera Pedestrian Detection System.
Mid 2010
Volvo S60 - Lane Departure Warning, Vehicle Detection & Radar-Vision Fusion for automatic emergency Collision Mitigation by Braking with automatic emergency braking Pedestrian Detection.
2011
Lane Departure Warning & Intelligent Headlight Control & Traffic Sign Recognition & vision only Forward Collision Warning, later addition of Pedestrian Detection.
2012
Lane Departure Warning & Intelligent Headlight Control & Traffic Sign Recognition & vision only Forward Collision Warning & Headway Monitoring.
2012
Lane Departure Warning & Intelligent Headlight Control & Traffic Sign Recognition & vision only Forward Collision Warning & Pedestrian Detection.
Mobileye EyeQ2™ is manufactured by STMicroelectronics, and is cabin-grade automotive qualified. For a detailed EyeQ2 product brief, contact Sales@mobileye.com
General Overview:
The Sonics Interconnect:
Mobileye EyeQ2™ has five Vision Computing Engine (VCEs) and three Vector Microcode Machine (VMPs™) optimized for computing of major time-consuming image processing tasks. All the VCEs work in parallel, retrieving their tasks from tasks queues (one per each VCE) by the on-block DMA channels. The VCEs and VMPs™ communicate over the high bandwidth Interconnect block, via a common master port The task queues are managed by the on-block DMA channels. A high-speed, 128bit width, 512Kbyte on-chip SRAM is located on this Interconnect for fast image memory storage and retrieval.
Two Floating Point MIPS34K hyper threads RISC CPU
The VCE/VMP™ modules are:
• Classifier Engine - CE
• Image scaling & preprocessing units
• Pattern classifier units
• Tracker Engine-Trk
• Image warping & motion analysis unit
• Pre-process, Window-PW
• Image Convolver & image pyramid units
• Computes vertical & horizontal edge maps
• Filter Engine-F
• Features based classifier unit
• Disparity Finder Engine-dF
• Powerful stereo engine
• Programmable search, 2 pixel/clock
• Vector Microcode module (VMP™):
• A generic vector processing unit without cache.
• Vector Microcode machine:
– Very Long Instruction Word (VLIW)
– Each field is a Single Instruction Multi Data (SIMD)
– Each Instruction takes one clock
– Pipeline is handled by the programmer
• Program and Data memories are local
– No cache
– Deterministic accesses
• Instruction example (dx):{ R0=Read0; Next0; R1=R0;(R2, R0)=COMB(R1, R0); R3=HSUB(R1, R2); Write1(R3); Next1; Cont(0) }
Two MIPS34K hyper thread CPUs:
• 332Mhz operation
• 32KB Data and Instruction Caches
• 32KB and 8KB scratch pad memories
• Four treads per Core
• Interthread Unit for fast MIPS to MIPS communication
• Floating Point Arithmetic Units
16 channel DMA:
The 16 channel DMA Controller is located on Master Port. The DMA Controller is programmed by the MIPS34K CPU to support the captured video streams via the Video Interfaces block, drive the processed video via the Video out interface and for on and off chip general data transactions.
Main features are:
• Memory to memory, peripheral to memory, and peripheral to peripheral transfers
• Scatter or Gather DMA is supported through the use of linked lists
• 64bit AHB bus width
The Interconnect:
The interconnect provides a high connectivity scheme that is needed for providing the required data bandwidth of the vision processing. The M Interconnect routes the 11 master ports to the four slave ports and enables concurrent operation of up to four 128bit OCP busses. If there is a bus contention on a slave port, the Interconnect decides on the winning master according to the priority scheme.
Mobileye EyeQ2™ has two Video in and one Video out interfaces:
• Video In
– Supports a wide array of formats: Monochrome, Bayer, RGB, Y:Cb:Cr
– Input frame size – up to 2048 x 2048 (Bayer)
– Four data channels
– Blurring, Sub-sampling, g curve approximation per channel
– Programmable Cropping frame size per channel
– Up to four histograms per channel
• Video Out
– Supports RGB (5-6-5, 6-6-6, 8bit), Y:Cb:Cr 4:2:2 (8-8,8bit)
– Output frame size – up to 4096 x 2048
– Two layers (Image and Graphics)
– Transparency - α-blending
– LUT for data layer generation
Mobileye EyeQ2™ has the following interfaces:
A separate 32-bit low bandwidth Peripheral Bus (APB) is provided to connect all of the various peripherals such as the CAN Controllers
• High connectivity
– 2 x CAN 2.0 ports
– 2xUART
– I2C
– 32bit GPIO
– 8 Timers
• Expandability
– 16-bit Flash/SRAM Ctrl
– 64-bit Mobile DDR-SDRAM - fast and Robust external memories
Mobileye EyeQ2™ debug supports
In addition to the standard JTAG, the device supports high visibility by two debug ports: This enables to trace the CPUs internal activity as well as the internal Interconnect’s bus transactions. This allows the programmer to optimize the internal bandwidth and the11 processors performance.
– 16bit Program & Data trace (PDtrace). Lossless / Stall-free tracing of MIPS two CPUs
– 16bit Request-Response Trace (RRT). Innovated Lossless and Stall-free internal buses bandwidth and latency.
Mobileye EyeQ™development platform EPM2
The following development platform enables:
– Record EyeQ Image processing to the PC
– Download video streams from the PC to Mobileye EyeQ2™
– Download new code to Mobileye EyeQ2™ from the PC
– Download Calibration to Mobileye EyeQ2™ from the PC
Mobileye has already installed dozens of EPM2 systems at multiple Tier1 partner companies and global auto makers for R&D as well as series programs.
